Aithris Prìobhaideachd: Tha do phrìobhaideachd glè chudromach dhuinne. Tha a 'chompanaidh againn a' gealltainn gun a bhith a 'foillseachadh do fhiosrachadh pearsanta do cheadan soilleir.
Modal Àir.: NSO4GU3AB
Còmhdhail: Ocean,Air,Express,Land
Seòrsa Pàighidh: L/C,T/T,D/A
Incoterm: FOB,EXW,CIF
4GB 1600MHZ 240-PIN DDR3 UDIMM
Eachdraidh ath-sgrùdaidh
Revision No. |
History |
Draft Date |
Remark |
1.0 |
Initial Release |
Apr. 2022 |
|
Òrdachadh clàr fiosrachaidh
Model |
Density |
Speed |
Organization |
Component Composition |
NS04GU3AB |
4GB |
1600MHz |
512Mx64bit |
DDR3 256Mx8 *16 |
Tuairisgeul
Tha Henstanttar Unbuffered DDROffered DDROffered DDNMS SDNME (reata dàta neo-shoilleir Synchronous Glass Drama, modalan cuimhne àrd-astar a bhios a 'cleachdadh innealan DDR3 SDRS. Is e NS04GU3ab tha dà ìre 44m X 64-bit dà-rud 4GB DDR3-1600 CL11 1.5v Sgnduffered Butions, stèidhichte air pàirtean sia-deug 25-bit FBG.6MM X 8-bit fbga. Tha an SPD air a phrògramachadh gu Jedec Coitcheann Catency Ìre DDR3-1600 Ùine nan 11-11-11 aig 1.5v. Bidh gach Dimm 240-prìne a 'cleachdadh òrdaidh òir. Tha an SCRAME UNNOFORE Dimm air a chleachdadh airson a chleachdadh mar phrìomh chuimhne nuair a thèid a chuir a-steach ann an siostaman leithid PCan agus ionadan obrach.
Feartan
Shempower Solarachadh: VDD = 1.5v (1.425V gu 1.575v)
vdq = 1.5v (1.425v gu 1.575v)
800mhz Fck airson 1600MB / SEC / PIN
8 Banca taobh a-staigh neo-eisimeileach
Cas Latency Cas: 11, 10, 9, 8, 7, 6
Latency additive: 0, CL - 2, no CL - 1 Cloc
8-bit ro-fetch
BETIBURST Fad: 8 (Interleave gun chrìoch sam bith, Sòn le seòladh tòiseachaidh "000"), 4 le TCCD gun chosg a 'cleachdadh A12 no Mrs]
-stiùiridh strobe dàta eadar-dhealaichte
Ean-calibration eanchainn (fèin) (fèin); Fèin-shàr-ghairm a-staigh tro Pin ZQ (RZQ: 240 ohm ± 1%)
on bàsachadh crìochnachaidh a 'cleachdadh Pin ODT
1age Ùraich ùine 7.8us aig amannan nas ìsle na TACAL 85 ° C, 3.9US Aig 85 ° C <TACE <95 ° C.
ashynchronous ath-shuidheachadh
OBADJUSTLE OUTPUT OUTTUPT LEASACHADH
le topology
pcb: Àirde 1.18 "(30mm)
Urhhhhs agus halogen-saor
Prìomh pharamadairean timing
MT/s |
tRCD(ns) |
tRP(ns) |
tRC(ns) |
CL-tRCD-tRP |
DDR3-1600 |
13.125 |
13.125 |
48.125 |
2011/11/11 |
Clàr seòlaidh
Configuration |
Refresh count |
Row address |
Device bank address |
Device configuration |
Column Address |
Module rank address |
4GB |
8K |
32K A[14:0] |
8 BA[2:0] |
2Gb (256 Meg x 8) |
1K A[9:0] |
2 S#[1:0] |
Tuairisgeulan PIN
Symbol |
Type |
Description |
Ax |
Input |
Address inputs: Provide the row address for ACTIVE commands, and the column |
BAx |
Input |
Bank address inputs: Define the device bank to which an ACTIVE, READ, WRITE, or |
CKx, |
Input |
Clock: Differential clock inputs. All control, command, and address input signals are |
CKEx |
Input |
Clock enable: Enables (registered HIGH) and disables (registered LOW) internal circuitry |
DMx |
Input |
Data mask (x8 devices only): DM is an input mask signal for write data. Input data is |
ODTx |
Input |
On-die termination: Enables (registered HIGH) and disables (registered LOW) |
Par_In |
Input |
Parity input: Parity bit for Ax, RAS#, CAS#, and WE#. |
RAS#, |
Input |
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being |
RESET# |
Input |
Reset: RESET# is an active LOW asychronous input that is connected to each DRAM and |
Sx# |
Input |
Chip select: Enables (registered LOW) and disables (registered HIGH) the command |
SAx |
Input |
Serial address inputs: Used to configure the temperature sensor/SPD EEPROM address |
SCL |
Input |
Serial |
CBx |
I/O |
Check bits: Used for system error detection and correction. |
DQx |
I/O |
Data input/output: Bidirectional data bus. |
DQSx, |
I/O |
Data strobe: Differential data strobes. Output with read data; edge-aligned with read data; |
SDA |
I/O |
Serial |
TDQSx, |
Output |
Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD |
Err_Out# |
Output (open |
Parity error output: Parity error found on the command and address bus. |
EVENT# |
Output (open |
Temperature event: The EVENT# pin is asserted by the temperature sensor when critical |
VDD |
Supply |
Power supply: 1.35V (1.283–1.45V) backward-compatible to 1.5V (1.425–1.575V). The |
VDDSPD |
Supply |
Temperature sensor/SPD EEPROM power supply: 3.0–3.6V. |
VREFCA |
Supply |
Reference voltage: Control, command, and address VDD/2. |
VREFDQ |
Supply |
Reference voltage: DQ, DM VDD/2. |
VSS |
Supply |
Ground. |
VTT |
Supply |
Termination voltage: Used for control, command, and address VDD/2. |
NC |
– |
No connect: These pins are not connected on the module. |
NF |
– |
No function: These pins are connected within the module, but provide no functionality. |
NOTAICHEAN : Is e liosta iomlan a th 'anns a' chlàr PIN PIN gu h-ìosal de na prìnichean a dh 'fhaodadh a bhith ann airson gach modal DDR3. Is dòcha gu bheil a h-uile prìne a 'liostadh gun a bhith a 'faighinn taic air a' mhodal seo. Faic sònrachaidhean PIN airson fiosrachadh a tha sònraichte don mhodal seo.
Diagram bloc gnìomh
MODALE 4GB, 512MX64 (2aranak of x8)
Tomhasan modal
Sealladh aghaidh
Sealladh aghaidh
Notaichean:
1. Tha tomhasan 1.All ann an millimeaks (òirlich); Max / Min no Toilichte (Tòinteamh) far an deach a chomharrachadh.
2.TleLance air a h-uile tomhas ± 0.15mm mura h-eilear a 'sònrachadh a chaochladh.
3. Tha an diagram beusach airson fiosrachadh a-mhàin.
Roinn-seòrsa bathair : Ardessories modal glic gluasadach
Aithris Prìobhaideachd: Tha do phrìobhaideachd glè chudromach dhuinne. Tha a 'chompanaidh againn a' gealltainn gun a bhith a 'foillseachadh do fhiosrachadh pearsanta do cheadan soilleir.
Lìon a-steach barrachd fiosrachaidh gus am faigh thu fios thugad nas luaithe
Aithris Prìobhaideachd: Tha do phrìobhaideachd glè chudromach dhuinne. Tha a 'chompanaidh againn a' gealltainn gun a bhith a 'foillseachadh do fhiosrachadh pearsanta do cheadan soilleir.